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TSMC has quietly introduced a performance-enhanced version of its 7 nm DUV (N7) and 5 nm EUV (N5) manufacturing process. 22nm to 14nm had a 2.4x density target which as we now know was a very difficult transition. An evolution of TSMC's 7nm node, N6 will continue to use the same design rules, making it easier for companies to get started on the new process. 7nm features are expected to approach ~20 nm width. The technology will be used for risk production of chips starting Q1 2020.TSMC says that it expects N6 to be used for a variety of applications, including mobile SoCs, GPUs, high-performance computing chips, networking, 5G infrastructure, and other products.
Intel’s process leadership was uncontested for years after that.Although the claims of Intel’s CEO are meant to reassure both customers and partners that the company is “still” as competitive as TSMC, this statement doesn’t come from a position of leadership in this aspect.This is why for its move to 7nm EUV, Intel will scale back the density increase to 2.0x. Thank you for signing up to Tom's Hardware. Furthermore, according to TSMC N6 'leverages new capabilities in extreme ultraviolet lithography (EUVL)' gained from N7+, but does not disclose how exactly it uses EUV for the particular technology. The company experienced some delays with Broadwell chips, which were the first to use the 14nm process. He said there's no insurmountable obstacle to 7nm production though added the company has prepared contingency … Intel 7nm with EUV will be back to a 2.0x scaling target. TSMC is giving a paper on 5nm and of course the chatter in the hallways has even more content.TSMC on the other hand delivered 16nm in 2015, 10nm in 2017, and 7nm in 2018.

Remember, TSMC is on the Apple iProducts schedule so they have to be in HVM early in the year versus late for Apple to deliver systems in Q4. The probability of EUV stochastic failure is measurably high for the commonly applied dose of 30 mJ/cm 2 . Intel 22nm was launched in 2011, 14nm came 3 years later (2014), and 10nm 5 years after that. The latter will also be offered in a performance-enhanced version called N5P. TSMC this week unveiled its new 6 nm (CLN6FF, N6) manufacturing technology, which is set to deliver a considerably higher transistor density when compared to the company's 7 nm (CLN7FF, N7) fabrication process. What remains to be seen is whether chip designers will be inclined to use N6 technology given its miniscule improvements over N7 when it comes to power, performance, and area (PPA). Intel also ended-up replacing the consumer Broadwell generation on the market with Skylake rather quickly.The reason the switch to 14nm was quite bumpy, too, was because Intel set out to increase the chip density by 2.4x, which ended-up a little too difficult to implement, but the company succeeded in achieving that eventually. Remember, TSMC is on the Apple iProducts schedule so they have to be in HVM early in the year versus late for Apple to deliver systems in Q4. These findings were further corroborated by Chinatimes as well. Making a FinFET to FinFET process equivalency statement is fine but from what I was told Intel will be using Nanosheets at 5nm.Remember, Intel was on a two year process cadence until 14nm. According to Bob Swan Intel 7nm is equivalent to TSMC 5nm, which I agree with, I just do not remember an Intel CEO ever saying such a thing. Intel's 7nm process tech is seen as comparable to TSMC's 5nm, which recently entered volume production. You can expect 5nm+ to fill in the gap year just as 7nm+ did in 2019. Essentially, N6 allows to shrink die sizes of designs developed using N7 design rules by around 15% while using the familiar IP for additional cost savings.TSMC will start risk production of chips using its N6 fabrication technology in the first quarter of 2020. And with AMD’s next CPUs on TSMC’s 7nm process, this marks a chance for them to jump past Intel in performance, and bring some healthy competition to Intel’s monopoly on the market—at least until Intel’s 10nm “Sunny Cove” chips start hitting shelves. Those TSMC clients that need a ~ 18~20% higher transistor density are expected to use N7+ and N6 process technologies that use extreme ultraviolet (EUV) lithography for several layers.While both N7 and N6 will be ‘long’ nodes that will be used for years to come, TSMC’s next major node with substantial density, power, and performance improvements is N5 (5 nm).
From 14nm to 10nm Intel targeted a 2.7x density target which led to even more manufacturing challenges. TSMC will deliver 5nm in 2020 and 3nm (also a FinFET based technology) is scheduled for 2022. The portion in the red box indicates Intel has booked a product at TSMC's 6nm process along with orders on 7nm and 7nm+ from AMD. On a conference call for investors on Thursday, CEO Bob Swan said Intel has identified a defect in its 7nm production process that caused degradation, and has taken steps to address it. Dozens of articles hit the internet by people who have no idea what they are talking about so don’t waste your time.Bob also talks about Intel’s transitions from 22nm to 14nm to 10nm in very simple terms. TSMC’s 5nm EUV Making Progress: PDK, DRM, EDA Tools, 3rd Party IP Ready TSMC: 7nm Now Biggest Share of Revenue TSMC: First 7nm EUV Chips Taped Out, 5nm Risk Production in Q2 2019